Integrating FPGA-Based Acceleration in Industrial Motion Control System
Published by
IEEE Open Journal of the Industrial Electronics Society
Summary
journal-article
About
Work
Università degli Studi di Cagliari
|Assistant Professor (RTDa)
Italy
→
University of Sassari
|Assistant/Postdoc researcher
Italy
→
Education
Università degli Studi di Cagliari
Italy
→
Master's degree in Electronic Engineering
Università degli Studi di Cagliari
Italy
→
Bachelor's degree in Electronic Engineering
Publications
ONNX-To-Hardware Design Flow for Adaptive Neural-Network Inference on FPGAs
Summary
book-chapter
Design methodologies and architectures for application-specific coarse-grain reconfigurable accelerators
Summary
other
A multithread AES accelerator for Cyber-Physical Systems
Summary
conference-paper
A multithread AES accelerator for Cyber-Physical Systems
Summary
conference-paper
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators
Summary
journal-article
Multithread Accelerators on FPGAs: A Dataflow-Based Approach
Summary
conference-paper
Multithread Accelerators on FPGAs: A Dataflow-Based Approach
Published by
OpenAccess Series in Informatics
Summary
journal-article
Mutual Impact between Clock Gating and High Level Synthesis in Reconfigurable Hardware Accelerators
Published by
Electronics
Summary
journal-article
Mutual Impact between Clock Gating and High Level Synthesis in Reconfigurable Hardware Accelerators
Published by
Electronics
Summary
journal-article
Mutual impact between clock gating and high level synthesis in reconfigurable hardware accelerators
Published by
Electronics (Switzerland)
Summary
journal-article
Mutual Impact between Clock Gating and High Level Synthesis in Reconfigurable Hardware Accelerators
Summary
journal-article
Mutual Impact between Clock Gating and High Level Synthesis in Reconfigurable Hardware Accelerators
Published by
Electronics
Summary
journal-article